PLX is a small, general-purpose, subword-parallel instruction set architecture (ISA) designed at Princeton University, Department of Electrical Engineering. PLX is designed to be a simple yet high-performance ISA for multimedia information processing.
There are several versions of the PLX architecture and the toolset. The documentation for each of these is provided below.
This is the current development version of PLX and therefore it is not yet publicly available. PLX developers can login to access these documents with their download password. Please fill out this form and email to rblee@princeton.edu to obtain a password.
PLX architecture and
tools have been used in some of the papers published by PALMS. These are listed
below: