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2006
"Scope of DDoS Countermeasures: Taxonomy of Proposed Solutions and Design Goals for Real-World Deployment",
8th International Symposium on Systems and Information Security (SSI'2006), November 2006.
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"Virtualization of a Processor-based Crypto-Protection Mechanism and Integration within a Separation Kernel Architecture",
Princeton University Department of Electrical Engineering Technical Report CE-L2006-006, November 2006.
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"Satisfiability-based Framework for Enabling Side-channel Attacks on Cryptographic Software",
Proceedings of the Conference on Design, Automation and Test in Europe (DATE 2006), Munich, Germany, pp. 18-23, March 2006.
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"Impact of Configurability and Extensibility on IPSec Protocol Execution on Embedded Processors",
Proceedings of the 19th International Conference on VLSI Design (VLSID 2006), Hyderabad, India, IEEE Computer Society, pp. 299-304, January 2006.
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"Covert and Side Channels due to Processor Architecture",
Proceedings of the 22nd Annual Computer Security Applications Conference (ACSAC'06), pp. 473-482, December 2006.
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"Fast Bit Compression and Expansion with Parallel Extract and Parallel Deposit Instructions",
Proceedings of the IEEE 17th International Conference on Application-Specific Systems, Architectures and Processors (ASAP), pp. 65-72, 11/09/2006.
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2007
Checking Integrity of Untrusted Data with Few Queries,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-008, September 2007.
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"TEC-Tree: A Low Cost, Parallelizable Tree for Efficient Defense against Memory Replay Attacks",
Proc. Workshop on Cryptographic Hardware and Embedded Systems (CHES 2007), Vienna, Austria, pp. 289-302, September 2007.
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"Hardware-rooted Trust for Secure Key Management and Transient Trust",
ACM Conference on Computer and Communications Security (CCS) 2007, Alexandria, VA, pp. 389-400, October 2007.
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A Secure yet High Performance Cache Architecture,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-012, November 2007.
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Dynamic Integrity Trees for Deployable Memory Authentication,
, Department of Electrical Engineering Technical Report CE-L2007-013, November 2007.
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Decimation Tools Set,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-014, November 2007.
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Fast Bit Matrix Multiplication in Commodity Microprocessors,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-011, November 2007.
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PAX: A Cryptographic Processor with Parallel Table Lookup and Wordsize Scalability,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-010, November 2007.
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"Secure Key Management Architecture Against Sensor-node Fabrication Attacks",
IEEE GlobeCom 2007, Washington, DC, November 2007.
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"Mutual Anonymous Communications: A New Covert Channel Based on Splitting Tree MAC",
IEEE Infocom 2007, pp. 2531-2535, May 6-12, 2007.
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TEC-Tree: A Low Cost and Parallelizable Tree for Efficient Defense against Memory Replay Attacks,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-002, March 2007.
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Memory Integrity for Secure Computing Platforms,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-003, June 2007.
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"New Cache Designs for Thwarting Software Cache-based Side Channel Attacks",
Proceedings of the 34th International Symposium on Computer Architecture (ISCA 2007), San Diego, CA, pp. 494 - 505, June 2007.
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"Performing Advanced Bit Manipulations Efficiently in General-Purpose Processors",
Proceedings of the 18th IEEE Symposium on Computer Arithmetic (ARITH-18), Montpellier, France, pp. 251-260, June 2007.
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"Re-examining Probabilistic Versus Deterministic Key Management",
Proceedings of the 2007 IEEE International Symposium on Information Theory (ISIT), Nice, France, pp. 2586-2590, June 2007.
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A New Basis for Shifters in General-Purpose Processors for Existing and Advanced Bit Manipulations,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-004, July 2007.
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Accelerating the Whirlpool Hash Function using On-Chip Lookup Tables,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-001, February 2007.
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Efficient Randomness Generation Techniques for Embedded Systems,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-015, December 2007.
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Achieving Very Fast Bit Matrix Multiplication in Commodity Microprocessors,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-006, August 2007.
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