PLX
What is PLX?
PLX is a small, general-purpose, subword-parallel instruction set architecture (ISA) designed at Princeton University, Department of Electrical Engineering. PLX is designed to be a simple yet high-performance ISA for multimedia information processing.
PLX History
- In Fall 2001, design goals and
architecture for PLX were specified by Prof. Ruby B. Lee of
- PLX 0.1 was encoded, documented, and
implemented as a project for the ELE-572 Class during Spring 2001 by
- PLX 0.1 was then completely modified,
with numerous additions and deletions of instructions and features,
re-encoded by R.B. Lee and A.M. Fiskiran, and released as PLX 1.0 in
September 2001.
- PLX 1.1 was released in February 2002.
This version of PLX has a software toolset that includes an assembler, a
compiler, and a simulator.
- Currently PLX is being maintained and
developed by PALMS along with collaboration from other universities. The
current development version for the architecture and tools is 1.2.
- Through the Fall term of 2001-02,
students of the ELE-475 class have contributed to the PLX simulator. This
work included extending the simulator, writing a benchmark library, and
making PLX-specific optimizations to these benchmarks.
- Through the Spring term of 2001-02, students of the ELE-572 class have contributed to the PLX project. This work involved developing a compiler for PLX and extending the simulator.
Evolution of the PLX Architecture
There are several versions of the PLX architecture and the toolset. The documentation for each of these is provided below.
PLX Documentation and Downloads
PLX 1.2
This is the current development version of PLX and therefore it is not yet publicly available. PLX developers can login to access these documents with their download password. Please fill out this form and email to rblee@princeton.edu to obtain a password.
For a quick comparison of PLX versions, see this file
The architecture documentation is divided into two parts: (1) ISA reference describing the instructions and general features of PLX, and (2) ISA encoding describing how the PLX instructions map to 32-bit instruction words.
Architecture
Toolset
Not available yet.
Other
A preliminary version of the encoding of PLX floating-point instructions. Floating-point support is planned to be included in the next version of PLX. This encoding is subject to change.
PLX 1.1
Architecture
Toolset
PLX 1.0
Architecture
Toolset
PLX 1.0 was released as an ISA specification only and had no accompanying software tools.
| Attachment | Size |
|---|---|
| PLXPAXapplicationform.xls | 18 KB |
| PLX-version-history.txt | 1.73 KB |
PLX Publications
PLX architecture and
tools have been used in some of the papers published by PALMS. These are listed
below:
- Ruby B. Lee and A. Murat Fiskiran, PLX: An Instruction Set Architecture and Testbed for Multimedia Information Processing, Journal of VLSI Signal Processing 40, 85-108, 2005. [PDF]
- Xiao Yang, Shamik K. Valia, Michael J. Schulte, and Ruby B. Lee, Exploration and Evaluation of PLX Floating-point Instructions and Implementations for 3D Graphics, Proceedings of the 38th Annual Asilomar Conference on Signals, Systems, and Computers, November 2004. [PDF]
- Ruby B. Lee and A. Murat Fiskiran, PLX: A Fully Subword-Parallel Instruction Set Architecture for Fast Scalable Multimedia Processing, Proceedings of the 2002 IEEE International Conference on Multimedia and Expo (ICME 2002), pp. 117-120, August 2002. [PDF] [PDF from proceedings]
- Ruby B. Lee, A. Murat Fiskiran, Zhijie Shi and Xiao Yang, Refining Instruction Set Architecture for High-Performance Multimedia Processing in Constrained Environments, Proceedings of the 13th International Conference on Application-specific Systems, Architectures and Processors (ASAP 2002), pp. 253-264, July 2002. [PDF] [PDF from proceedings]
This paper discusses the new permutation instructions included in PLX 1.2:
- Ruby B. Lee, Subword Permutation Instructions for Two-Dimensional Multimedia Processing in MicroSIMD Architectures, Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2000), pp. 3-14, July 2000. [PDF]
This paper discusses how to use PLX multimedia instructions to do matrix transpose: