PALMS - Princeton University

Attacks

• Berstein's attack
• Percival's attack
• Cache-collision timing attack
• Branch prediction attack (Onur)
• I-cache attack (Onur)
• Covert and Side Channels due to Processor Architecture

Defenses

We do not claim that the list is complete and the list will constantly be updated to reflect the latest research.

PALMS papers

• New Cache Designs for Thwarting Software Cache-based Side Channel Attacks
• A Novel Cache Architecture with Enhanced Performance and Security
• Information Leakage Due to Cache and Processor Architectures

Others

• Software mitigations to hedge AES against cache-based software side channel vulnerabilities
• Hardware-software integrated approaches to defend against software cache-based side channel attacks
• Deconstructing New Cache Designs for Thwarting Software Cache-based Side Channel Attacks
• Non-monopolizable caches: Low-complexity mitigation of cache side channel attacks

Capacity of Covert and Side Channels:

• New Constructive Approach to Covert Channel Modeling and Channel Capacity Estimation
• Capacity Estimation of Non-Synchronous Covert Channels

Contributors

• Yu-Yuan Chen
• Jakub Szefer
• Jingfei Kong
• Fangfei Liu