PALMS - Princeton University

Hardware-enhanced security architectures are becoming increasingly important due to escalating security breaches. However, security validation and performance evaluation of these hardware-software architectures usually requires two different platforms. OpenSPARC is an open-source, FPGA synthesizeable general-purpose microprocessor originally developed by Sun Microsystems. It is a multi-core, multi-threaded 64- bit microprocessor. OpenSPARC includes open-source hardware (including microprocessor core) as well as software that can be freely modified by researchers. But can it serve as a single platform for both security and performance research and evaluation? We find that it has many advantages: ability to modify real hardware to add security features, ease of modification due to certain components being emulated, ability to run commodity OS and benchmarks, etc. There are, however, certain disadvantages for using the platform for performance evaluation. We hope that this work can be a starting point for researchers interested in the OpenSPARC platform to understand both its potential and its limitations. We also suggest FPGA tool improvements that can significantly improve OpenSPARC’s suitability for security and performance research.

• Stock OpenSPARC
  • Readme
  • Source set
  • Legion set
  • FPGA set
• Bastion OpenSPARC
  • Readme
  • Source set
  • Legion set
  • FPGA set
• Performacce Platform with Timers
  • Readme
  • Source set with Timers
  • FPGA set with Timers
  • Source set with Memory Integrity Tree
  • FPGA set with Memory Integrity Tree
  • Source set with AES engine
  • FPGA set with AES engine
• Benchmarks
  • Readme
  • SPEC2000 Benchmarks SPARC Binaries
  • SPEC2006 Benchmarks SPARC Binaries