PAX
About PAX
PAX is a datapath-scalable, minimalist cryptographic processor architecture for mobile and wireless information appliances. The chief design goal of PAX is to enable security processing at high enough throughputs to fully utilize the high bandwidth connections offered by the existing and emerging wireless technologies. The next-generation cellular and WLAN technologies are expected to have data rates as high as 100 Mbps.
PAX Documentation and Downloads
PAX 2.0
Similar to PAX-PLX 1.0, it is encoded on top of the existing encodings of PLX. Neverthless, since this is a PAX-only processor, there are no PLX instructions in this version. This version is currently under development and therefore it is not yet publicly available. PAX developers can access these documents with their download password. Please fill out this form (explanation) and email to rblee@princeton.edu to obtain a password.
PAX configuration and education tool set
The PAX configuration and education tool set is developed by Samuel J. Albert. The zip file includes the PAX ToolSet application, readme file and source code.
Readme for PAXToolset
The PAX Toolset is launched from the ConfigurationTool executable jar file.
Configuration Tool
1. Select root folder of source design files. By default, project source
PAX FPGA Project
Currently, PAX is supported by an assembler, and can be implemented on a Xilinx Virtex II Pro FPGA. More specifically, the following are suppoted by PAX:
- PAX-32 Assembler and FPGA
- PAX-64 Assembler and FPGA
- PAX-128 Assembler
The PAX-128 FPGA is currenlty not yet working. The PAX user manual describes how to use the PAX assembler and FPGA, and addresses the current state of progress on PAX-128.
The following documents pertaining to the PAX FPGA project are available for download:
PAX Publications
PAX architecture and
tools have been used in some of the papers published by PALMS. These are listed
below:
- A.M. Fiskiran and R.B. Lee, PAX: A Datapath-Scalable Minimalist Cryptographic Processor for Mobile Environments, Princeton University Department of Electrical Engineering Technical Report CE-L2003-005, Jun. 2003. [PDF]
- A.M. Fiskiran and R.B. Lee, PAX: A Datapath-Scalable Minimalist Cryptographic Processor for Mobile Environments, in Embedded Cryptographic Hardware: Design and Security, Nova Science Publishers, NY, USA, 2005. [Link]
- R.B. Lee, A.M. Fiskiran, M. Wang, Y. Hilewitz and Y. Chen, PAX: A Cryptographic Processor with Parallel Table Lookup and Wordsize Scalability, submitted toTransactions on Computers, IEEE [PDF]