Many applications require protection of secret or sensitive information, from sensor nodes and embedded applications to large distributed systems. The confidentiality of data can be protected by encryption using ciphers and the integrity of the data can be ensured by using a cryptographic hash functions. Our work investigates how more efficient cryptographic circuits can be designed and implemented. We are interested in more efficient circuits because they will enable wider deployment of strong ciphers and hash functions for protecting data, while minimizing the overhead these cryptographic protections impose. Currently the work concentrates on symmetric-key ciphers and the new hash algorithms proposed for the National Institute of Standards and Technology (NIST) competition for Advanced Hash Algorithms (AHS).
We use field programable gate arrays (FPGAs) for implementing our proposals and prototyping the hardware. In addition to implementing stand-alone crypto blocks (e.g. AES accelerator) we are working on designing a platform (a collection of hardware components which implement different functionalities used by cryptographic algorithms) that can be used to enable rapid prototyping and deployment of cryptographic and other algorithms.