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"Maya: A Novel Block Encryption Function",
International Workshop on Coding and Cryptography (WCC 2009), Ullensvang, Norway, May 2009.
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"Multi-path Key Establishment Against REM Attacks in Wireless Ad Hoc Networks",
IEEE Global Communications Conference (GLOBECOM 2009), Honolulu, Hawaii, USA, Nov/Dec 2009.
Abstract
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"Making Security Validation as Easy as Performance Evaluation",
Princeton University Department of Electrical Engineering Technical Report CE-L2009-005, November 2009.
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Multi-path Key Establishment under Byzantine Attacks in Wireless Ad Hoc Networks,
, 2008 .
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"Mutual Anonymous Communications: A New Covert Channel Based on Splitting Tree MAC",
IEEE Infocom 2007, pp. 2531-2535, May 6-12, 2007.
Abstract
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Memory Integrity for Secure Computing Platforms,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-003, June 2007.
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"Micro-Architecture Issues of Predicated Execution",
Proceedings of the 37th Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, California, USA, pp. 349-354, Nov. 2003.
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"Multimedia Instructions in Microprocessors for Native Signal Processing",
Book Chapter in Yu Hen Hu, ed., Programmable Digital Signal Processors: Architecture: Programming, and Applications, New York, Marcel Dekker, Inc., ISBN: 0-8247-0647-1, pp. 91-145, 2001 .
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"Multimedia Instructions in IA-64",
Proceedings of the IEEE International Conference on Multimedia and Expo (ICME 2001), Tokyo, Japan, Aug. 2001, pp. 281-284, 2001 .
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"New models for understanding and reasoning about speculative execution attacks",
IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2021, 2021 .
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"Newcache: secure cache architecture thwarting cache side channel attacks",
IEEE Micro Special Issues on Security, vol. 36, issue 5, Sept/Oct 2016.
Abstract
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"New Models of Cache Architectures Characterizing Information Leakage from Cache Side",
Proceedings of Annual Computer Security Applications Conference (ACSAC), December 2014, pp. 96-105, 2014 .
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"NoHype: Virtualized cloud infrastructure without the virtualization",
in Proceedings of the International Symposium on Computer Architecture, ISCA, June 19-23 2010.
Abstract
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"New Cache Designs for Thwarting Software Cache-based Side Channel Attacks",
Proceedings of the 34th International Symposium on Computer Architecture (ISCA 2007), San Diego, CA, pp. 494 - 505, June 2007.
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"New Constructive Approach to Covert Channel Modeling and Channel Capacity Estimation",
Proceedings of the 8th Information Security Conference (ISC 2005), Singapore, pp. 498-505, September 2005.
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"On-Chip Lookup Tables for Fast Symmetric-Key Encryption",
Proceedings of the IEEE 16th International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2005), Samos, Greece, pp. 356-363, July 23-25, 2005.
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"On Permutation Operations in Cipher Design",
Proceedings of the International Conference on Information Technology (ITCC 2004), Las Vegas, Nevada, USA, pp. 569-577, April 5-7, 2004.
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"Position Paper: Consider Hardware-enhanced Defenses for Rootkit Attacks",
Proceedings of the 9th International Workshop on Hardware and Architectural Support for Security and Privacy (HASP), 2020 .
Abstract
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"Power-Grid Controller Anomaly Detection with Enhanced Temporal Deep Learning",
IEEE International Conference on Trust, Security and Privacy in Computing and Communications (TrustCom), 05/08/2019.
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"Physical Attack Protection with Human-Secure Virtualization in Data Centers",
Workshop on Open Resilient human-aware Cyber-physical Systems (WORCS), June 25, 2012.
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"Processor Accelerator for AES",
Proceedings of the 2010 IEEE 8th Symposium on Application Specific Processors, Anaheim, CA, USA, pp. 71-76, June 13-14 2010.
Abstract
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"Processor-based Tailored Attestation",
Princeton University Department of Electrical Engineering Technical Report CE-L2010-005, Nov 15, 2010., 2010 .
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PAX: A Cryptographic Processor with Parallel Table Lookup and Wordsize Scalability,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-010, November 2007.
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"Performing Advanced Bit Manipulations Efficiently in General-Purpose Processors",
Proceedings of the 18th IEEE Symposium on Computer Arithmetic (ARITH-18), Montpellier, France, pp. 251-260, June 2007.
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"Protecting Cryptographic Keys and Computations via Virtual Secure Coprocessing",
Computer Architecture News, vol. 33., no. 1, pp. 16-26, March 2005, and Proceedings of the Workshop on Architectural Support for Security and Antivirus (WASSA 2004), Boston, Massachusetts, USA, Oct. 9-13, 2004.
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