A
"Enhancing Security through Hardware-assisted Run-time Validation of Program Data Properties",
Proceedings of ACM/IEEE International Conference on Hardware Software Co-design and System Synthesis (CODES+ISSS 2005), New York, USA, pp. 190-195, Sept. 2005.
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"Architectural Enhancements for Secure Embedded Processing",
Proceedings of the NATO Advanced Research Workshop "Security and Embedded Systems", Patras, Greeece, Aug. 2005.
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C
"Hardware-Assisted Application-Level Access Control",
Information Security Conference, Pisa, Italy, September 7-9.
Abstract
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"Impact of Dynamic Binary Translators on Security",
1st Workshop on Architectural and Microarchitectural Support for Binary Translation, Beijing, China, 21/06/2008.
Abstract
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"A security architecture for transient trust",
Proceedings of the 2nd ACM workshop on Computer security architectures, Alexandria, Virginia, pp. 1-8, October 31.
Abstract
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Dynamic Integrity Trees for Deployable Memory Authentication,
, Department of Electrical Engineering Technical Report CE-L2007-013, November 2007.
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Memory Integrity for Secure Computing Platforms,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-003, June 2007.
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"Scope of DDoS Countermeasures: Taxonomy of Proposed Solutions and Design Goals for Real-World Deployment",
8th International Symposium on Systems and Information Security (SSI'2006), November 2006.
Abstract
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"Fast Software-Based Attacks on Secure ID",
Proceedings of the 11th International Workshop on Fast Software Encryption (FSE 2004), Delhi, India, pp. 454-471, Feb. 2004.
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D
"Forward-Secure Content Distribution to Reconfigurable Hardware",
Proceedings of the Int'l Conference on ReConFigurable Computing and FPGAs (Reconfig'08), December 2008.
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"The Reduced Address Space for Application Memory Authentication",
Proceedings of the 11th Information Security Conference (ISC'08), September 2008.
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"Hardware-rooted Trust for Secure Key Management and Transient Trust",
ACM Conference on Computer and Communications Security (CCS) 2007, Alexandria, VA, pp. 389-400, October 2007.
Abstract
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"Secure Key Management Architecture Against Sensor-node Fabrication Attacks",
IEEE GlobeCom 2007, Washington, DC, November 2007.
Abstract
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SP Processor Architecture Reference Manual,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-009, 11/21/2007.
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"Scoping Security Issues for Interactive Grids",
Proceedings of the 37th Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, California, USA, pp. 367-373, Nov. 2003.
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E
"Accountability in Hosted Virtual Networks",
VISA 2009, ACM Sigcomm workshop, Barcelona, Spain, August 17.
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"TEC-Tree: A Low Cost, Parallelizable Tree for Efficient Defense against Memory Replay Attacks",
Proc. Workshop on Cryptographic Hardware and Embedded Systems (CHES 2007), Vienna, Austria, pp. 289-302, September 2007.
Abstract
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TEC-Tree: A Low Cost and Parallelizable Tree for Efficient Defense against Memory Replay Attacks,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-002, March 2007.
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F
"On-Chip Lookup Tables for Fast Symmetric-Key Encryption",
Proceedings of the IEEE 16th International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2005), Samos, Greece, pp. 356-363, July 23-25, 2005.
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"Fast Parallel Table Lookups to Accelerate Symmetric-Key Cryptography",
Proceedings of the International Conference on Information Technology: Coding and Computing (ITCC 2005), Las Vegas, Nevada, USA, pp. 526-531, April 4-6, 2005.
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"Evaluating Instruction Set Extensions for Fast Arithmetic on Binary Finite Fields",
Proceedings of the International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2004), Galveston, Texas, USA, pp. 125-136, Sept. 2004.
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"Performance Scaling of Cryptography Operations in Servers and Mobile Clients",
Proceedings of the Workshop on Building Block Engine Architectures for Computer Networks (BEACON 2004), Boston, Massachusetts, USA, Oct. 2004.
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"Runtime Execution Monitoring (REM) to Detect and Prevent Malicious Code Execution",
Proceedings of the International Conference on Computer Design (ICCD 2004), San Jose, California, USA, pp. 452-457, Oct. 11-13, 2004.
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"PAX: A Datapath-Scalable Minimalist Cryptographic Processor for Mobile Devices",
Book chapter in Nadia Nedjah and Luiza de Macedo Mourelle eds., Embedded Cryptographic Hardware: Design and Security, New York, Nova Science Publisher, ISBN: 1-59454-145-0, Chapter 2, pp. 19-34, 2004 .
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"Workload Characterization of Elliptic Curve Cryptography and other Network Security Algorithms for Constrained Environments",
Proceedings of the 5th IEEE Annual Workshop on Workload Characterization (WWC-5), Austin, Texas, USA, pp. 127-137, Nov. 2002.
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