Book Chapter
"PAX: A Datapath-Scalable Minimalist Cryptographic Processor for Mobile Devices",
Book chapter in Nadia Nedjah and Luiza de Macedo Mourelle eds., Embedded Cryptographic Hardware: Design and Security, New York, Nova Science Publisher, ISBN: 1-59454-145-0, Chapter 2, pp. 19-34, 2004 .
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"Permutation Operations in Block Ciphers",
Book chapter in Nadia Nedjah and Luiza de Macedo Mourelle eds., Embedded Cryptographic Hardware: Design and Security, New York, Nova Science Publisher, ISBN: 1-59454-145-0, Chapter 13, pp. 219-236, 2004 .
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"Instruction Set Architecture for Multimedia Signal Processing",
Book Chapter in Vojin G. Oklobdzija ed., The Computer Engineering Handbook: CRC Press, ISBN: 0-8493-0885-2, Invited Chapter, pp. 39-1 to 39-38, 2001 .
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"Multimedia Instructions in Microprocessors for Native Signal Processing",
Book Chapter in Yu Hen Hu, ed., Programmable Digital Signal Processors: Architecture: Programming, and Applications, New York, Marcel Dekker, Inc., ISBN: 0-8247-0647-1, pp. 91-145, 2001 .
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Journal Article
"A New Basis for Shifters in General-Purpose Processors for Existing and Advanced Bit Manipulations",
IEEE Transactions on Computing, vol. 58, issue 8, 08/2009.
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"Hardware Mechanisms for Memory Authentication: A Survey of Existing Techniques and Engines",
Transactions on Computational Science IV, Lecture Notes in Computer Science (LNCS), issue 5340, pp. 1-22, 2009 .
Abstract
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"Alternative application-specific processor architectures for fast arbitrary bit permutations",
International Journal of Embedded Systems, vol. 3, issue 4, pp. 219-228, 2008 .
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"Fast Bit Gather, Bit Scatter and Bit Permutation Instructions for Commodity Microprocessors",
Journal of Signal Processing Systems, vol. 53, issue 1-2: Springer New York, pp. 145-169, 11/2008.
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"Stability and Benefits of Suboptimal Utility Maximization",
submitted to IEEE Transactions on Networking, Nov. 4.
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"Aiding Side-channel Attacks on Cryptographic Software with Satisfiability-based Analysis",
IEEE Transactions on VLSI, vol. 15, issue 4, pp. 465-470, April 2007.
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"A Study of the Energy Consumption Characteristics of Cryptographic Algorithms and Security Protocols",
IEEE Transactions in Mobile Computing, vol. 5, issue 2, pp. 128-143, February 2006.
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"PLX: An Instruction Set Architecture and Testbed for Multimedia Information Processing",
Journal of VLSI Signal Processing, vol. 40, issue 1, pp. 85-108, 2005 .
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"Single-Cycle Bit Permutations with MOMR Execution",
Journal of Computer Science and Technology, vol. 20, issue 5, pp. 577-585, September 2005.
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"Architectural Techniques for Accelerating Subword Permutations with Repetitions",
IEEE Transactions on Very Large Scale Integration Systems, vol. 11, issue 3, pp. 325-335, June 2003.
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"Efficient Permutation Instructions for Fast Software Cryptography",
IEEE Micro, vol. 21, issue 6, pp. 56-69, Dec. 2001.
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Conference Paper
"Accountability in Hosted Virtual Networks",
VISA 2009, ACM Sigcomm workshop, Barcelona, Spain, August 17.
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"Hardware-Assisted Application-Level Access Control",
Information Security Conference, Pisa, Italy, September 7-9.
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"Maya: A Novel Block Encryption Function",
International Workshop on Coding and Cryptography (WCC 2009), Ullensvang, Norway, May 10-15.
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"Multi-path Key Establishment Against REM Attacks in Wireless Ad Hoc Networks",
IEEE Global Communications Conference (GLOBECOM 2009), Honolulu, Hawaii, USA, Jan. 17-20.
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"Securing the Dissemination of Emergency Response Data with an Integrated Hardware-Software Architecture",
2nd International Conference on Trusted Computing (TRUST 2009), Oxford, U.K., pp. 133-156, April 6-8.
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"Accelerating the Whirlpool Hash Function Using Parallel Table Lookup and Fast Cyclical Permutation",
Proceedings of the 15th Fast Software Encryption Workshop (FSE), Lausanne, Switzerland, February 2008.
Abstract
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"A Novel Cache Architecture with Enhanced Performance and Security",
Proceedings of the 41st. Annual IEEE/ACM International Symposium on Microarchitecture (Micro-41), pp. 88-93, December 2008.
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"A security architecture for transient trust",
Proceedings of the 2nd ACM workshop on Computer security architectures, Alexandria, Virginia, pp. 1-8, October 31.
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"Bit Matrix Multiplication in Commodity Processors",
Proceedings of 19th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP ‘08), July 2008.
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"Forward-Secure Content Distribution to Reconfigurable Hardware",
Proceedings of the Int'l Conference on ReConFigurable Computing and FPGAs (Reconfig'08), December 2008.
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