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M
"Performance Impact of Data Compression on Virtual Private Network Transactions",
Proceedings of the 25th IEEE Conference on Local Computer Networks (LCN 2000), Tampa, Florida, USA, pp. 500-510, Nov. 2000.
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"Hewlett-Packard Precision Architecture: the Processor",
HP Journal, vol. 37, issue 8, pp. 19, 08/1986.
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Decimation Tools Set,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-014, November 2007.
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PAX: A Cryptographic Processor with Parallel Table Lookup and Wordsize Scalability,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-010, November 2007.
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Resolving Encoding Issues in Combining PAX and PLX Instruction Sets,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-007, August 2007.
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"Single-Cycle Bit Permutations with MOMR Execution",
Journal of Computer Science and Technology, vol. 20, issue 5, pp. 577-585, September 2005.
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"Architecture for Protecting Critical Secrets in Microprocessors",
Proceedings of the 32nd International Symposium on Computer Architecture (ISCA 2005), Madison, Wisconsin, USA, pp. 2-13, June 4-8, 2005.
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"PLX: An Instruction Set Architecture and Testbed for Multimedia Information Processing",
Journal of VLSI Signal Processing, vol. 40, issue 1, pp. 85-108, 2005 .
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"Validating Word-oriented Processors for Bit and Multi-Word Operations",
Proceedings of the Asia-Pacific Computer Systems Architecture Conference (ACSAC 2004), Beijing, China, pp. 473-488, Sept. 2004.
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"On Permutation Operations in Cipher Design",
Proceedings of the International Conference on Information Technology (ITCC 2004), Las Vegas, Nevada, USA, pp. 569-577, April 5-7, 2004.
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"Permutation Operations in Block Ciphers",
Book chapter in Nadia Nedjah and Luiza de Macedo Mourelle eds., Embedded Cryptographic Hardware: Design and Security, New York, Nova Science Publisher, ISBN: 1-59454-145-0, Chapter 13, pp. 219-236, 2004 .
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"Enlisting Hardware Architecture to Thwart Malicious Code Injection",
Proceedings of the International Conference on Security in Pervasive Computing (SPC-2003), Boppard, Germany, pp. 237-252, March 2003.
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"Refining Instruction Set Architecture for High-Performance Multimedia Processing in Constrained Environments",
Proceedings of the 13th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2002), San Jose, California, pp. 253-264, July 2002.
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"How a Processor can Permute n bits in O(1) cycles",
Proceedings of IEEE Hot Chips 14 - A Symposium on High Performance Chips, Stanford University, USA, Aug. 2002.
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"PLX: A Fully Subword-Parallel Instruction Set Architecture for Fast Scalable Multimedia Processing",
Proceedings of the 2002 IEEE International Conference on Multimedia and Expo (ICME 2002), Lusanne, Switzerland, pp. 117-120, Aug. 2002.
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"Multimedia Instructions in Microprocessors for Native Signal Processing",
Book Chapter in Yu Hen Hu, ed., Programmable Digital Signal Processors: Architecture: Programming, and Applications, New York, Marcel Dekker, Inc., ISBN: 0-8247-0647-1, pp. 91-145, 2001 .
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"Efficient Permutation Instructions for Fast Software Cryptography",
IEEE Micro, vol. 21, issue 6, pp. 56-69, Dec. 2001.
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"Instruction Set Architecture for Multimedia Signal Processing",
Book Chapter in Vojin G. Oklobdzija ed., The Computer Engineering Handbook: CRC Press, ISBN: 0-8493-0885-2, Invited Chapter, pp. 39-1 to 39-38, 2001 .
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"Multimedia Instructions in IA-64",
Proceedings of the IEEE International Conference on Multimedia and Expo (ICME 2001), Tokyo, Japan, Aug. 2001, pp. 281-284, 2001 .
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"Cost-Effective Multiplication with Enhanced Adders for Multimedia Applications",
Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2000), vol. 1, Geneva Switzerland, pp. 651-654, May 2000.
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"Subword Permutation Instructions for Two-Dimensional Multimedia Processing in MicroSIMD Architectures",
Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2000), Boston, Massachusetts, USA, pp. 3-14, July 2000.
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"Efficiency of MicroSIMD Architectures and Index-Mapped Data for Media Processors",
Proceedings of Media Processors 1999 IS&T/SPIE Symposium on Electric Imaging: Science and Technology, San Jose, California, pp. 34-46, Jan. 1999.
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"Security as a New Dimension in Embedded System Design",
Proceedings of the 41st Design Automation Conference (DAC 2004), San Diego, California, USA, pp. 753-760, June 2004.
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"A Hardware-based Technique for Efficient Implicit Information Flow Tracking",
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Austin, IEEE, 07/11/2016.
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"Cyber Defenses for Physical Attacks and Insider Threats in Cloud",
Proceedings of the ACM Symposium on Information, Computer and Communications Security (AsiaCCS), June 2014.
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