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2000
"Cost-Effective Multiplication with Enhanced Adders for Multimedia Applications",
Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2000), vol. 1, Geneva Switzerland, pp. 651-654, May 2000.
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"Bit Permutation Instructions for Accelerating Software Cryptography",
Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2000), Boston, Massachusetts, USA, pp. 138-148, July 2000.
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"Subword Permutation Instructions for Two-Dimensional Multimedia Processing in MicroSIMD Architectures",
Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2000), Boston, Massachusetts, USA, pp. 3-14, July 2000.
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"Fast Subword Permutation Instructions Based on Butterfly Networks",
Proceedings of Media Processors IS&T/SPIE Symposium on Electric Imaging: Science and Technology, San Jose, California, pp. 80-86, Jan. 2000.
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1999
"Efficiency of MicroSIMD Architectures and Index-Mapped Data for Media Processors",
Proceedings of Media Processors 1999 IS&T/SPIE Symposium on Electric Imaging: Science and Technology, San Jose, California, pp. 34-46, Jan. 1999.
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1989
"Precision Architecture",
IEEE computer, vol. 22, issue 1, pp. 14, 01/1989.
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1986
"Hewlett-Packard Precision Architecture: the Processor",
HP Journal, vol. 37, issue 8, pp. 19, 08/1986.
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